Archive for the ‘FPGA’ Category

On the nature of hardware (FPGA) input and output

Monday, June 25th, 2007

Many people who have exclusively worked with software bring their software notions of input and output to FPGA land and get frustrated with the development software. VHDL and Verilog are not languages suitable for programming in a software style unless you are only interested in simulation, as opposed to implementation.

Some folks are implementing ESL (electronic system level) languages for software types who won’t or can’t get their minds to think in terms of hardware. The tools require far more work to get decent results, because of the greater mismatch between hardware and software. As a result, these relatively new commercial products are currently very expensive.

In hardware, inputs and outputs are connections. They are not operations! Just think of any audio/video setup. The tuners and players have output connectors; the consoles, amplifiers, and other equipment (such as equalizers and mixers) have both input and output connectors; speakers and video monitors have input connectors. You use cables, which are basically bunches of wires, to connect inputs to outputs. The system will work with older analog systems, as well as with newer digital systems. In other words, the whole notion of executing input and output instructions is not needed. Going digital does not change this property of hardware.

When power is on and connections are established, there is no such thing as no input or no output. In a combinatorial (i.e., unclocked) circuit, the circuit reacts immediately to changes in the input. It also changes its outputs immediately. In a clocked circuit, a clock signal is used to “sample” or “capture” the input, and to “change” the output. Some digital outputs can also be set to a “high impedance” state, which is logically a “disconnect”. This last state is important for creating bidirectional I/O on FPGA’s.

Hexadecimal on a 7-segment display

Saturday, September 16th, 2006

Well, now I think we should do something a bit more useful.

The fourth design displays a hexadecimal number on one of the 7-segment LED displays. A binary number is set with four slide switches, with UP meaning 1, and DOWN meaning 0.

There are several ways to solve this problem. The solution I chose is the VHDL when-else syntax used in an XESS tutorial. The Verilog equivalent is the ternary ?: syntax.

Two other ways are to use a process with if-elsif, or a process with case-when. The Verilog equivalents are an always block with if-else, or an always block with switch-case.

There is yet another way - determine the Boolean equation for lighting up each individual line segment and encode them as assignments. It doesn’t much matter if the assignments are inside or outside a process or always block.

On my previous designs, the 7-segment LED’s were dimly lit on my board. Why? Because of my default configuration of unused I/O pins, and the electronics on the Digilent board.

The default configuration attaches a PULLDOWN resistor to all the unused I/O pins, which pulls the pin voltage down towards 0V. You turn on a line segment by setting both the anode pin (for a digit) and the segment pin to 0V (= 0 in Verilog and VHDL). This ought to fully turn on unused line segments. However, due to the off-chip circuitry, the PULLDOWN is not strong enough to pull all the 7-segment pins to 0V. The result is dim line segments.

The fix is to put a “standard” 0 or 1 to turn the LED full on or full off. For example, setting AN3, AN2, and AN1 to 1 turns off the left three digits. However, because I am turning on AN0 with a 0, the decimal point on that digit will be lit dimly unless I turn it off with a 1 or turn it full on with a 0.

Update: 2008-12-29
My fourth design is now listed as my fifth design. Design #4 is a pair of RS latches.

Registers

Friday, September 15th, 2006

My third design implements a register. There are two inputs, clk and din, and one output, dout. The clk signal is connected to a push button, the din signal is connected to a slide switch, and the dout signal is connected to an LED.

You can flip the slide switch any number of times, but the LED won’t change state. Press the push button, and it will set the LED on or off depending on the position of the slide switch.

The register is a fundamental component of FPGA digital design. The development software favors the use of registers to change signals in a desired sequence.

Boolean logic

Thursday, September 14th, 2006

Anyone who has studied logic at some level, either in a philosophy class or a class on digital electronics knows the fundamental logic notions of and, or, and not. These are the operators of Boolean logic. People are often told that computers are logical, but the irony is that Boolean logic is not taught in a beginning software programming class, nor is it required for entry into such a class. What novice software programmers are taught is IF-THEN logic. Entrusted with an intuitive notion of and and or, some of the more complex conditions (two-level logic) are often implemented incorrectly, due to the different ways those words are deployed in English, especially in spoken English.

So, for the software folks who aren’t intimate with “bit fiddling,” the second design I implemented simply sets some of the LED’s to the results of using and, or, xor, and not. The inputs are controlled by the slide switches on the Digilent board. If this were a school lab, you would create a table that predicts the on/off status of each LED for all possible switch settings, and then record the LED statuses for each switch combination. As only two switches are used, there are only four switch combinations.

Of course, if you’ve been designing digital circuits for a while, then you already know this stuff and can safely skip this exercise. In which case, the only reason for doing this is so that you can add another set of pins to the UCF file.

Simple Digilent configuration

Wednesday, September 13th, 2006

Although I have plenty of example code that I could have adapted for the Digilent board, I thought I would implement the simplest possible design that did something interesting.

What I did was basically run a wire through the FPGA from one of the push buttons to one of the LED’s. Just one little assignment between two port signals does the trick. Push the button, and the LED lights up. Release the button, and the LED turns off. All you have to do is figure out how to run the software tools, how to assign the signals to the right pins (via a UCF file), and how to configure the FPGA. (That’s right, they don’t want to call it “programming.”)

My current configuration method is to generate a PROM file (MCS) from the bit file, and then to program the Flash using iMPACT, the JTAG cable, and the MCS file.

I have been using Webpack 6.3 for quite a while now. Because of the 7.1 bug that affected some CPLD designs, I’ve been hesitant to upgrade from version 6. Version 8 is now desirable because the CoreGen tool has been added to the free Webpack version. You no longer need to pay to get CoreGen.

I believe the machine I installed Webpack 8.2 on had never seen any Webpacks. Like my customized version 6 setup, the default setup generated IBUF’s and OBUF’s automatically for top level signals. Going to version 8 was like upgrading to XP. All that gray has been replaced by blue.

Digilent Spartan-3 Starter Board

Monday, September 11th, 2006

Well, I broke down and bought the Digilent Spartan-3 Starter Board. This board is apparently no longer sold by Xilinx, but it can still be bought directly from Digilent. You get both the programming cable and a power supply, so there is no extra hardware to buy.

However, Digilent does not deliver any documentation or software with the hardware, so you need to go to their site to download the User Guide, and to Xilinx to get the development software. The Webpack version of Xilinx’s ISE is free, and is now currently at version 8.

This board has SRAM, which is easier to interface, without library support, than the SDRAMs used on newer evaluation/development boards.

The board came jumpered to use the XCFxxS Platform Flash as the configuration PROM for the FPGA. As I had bought the XC3S1000 version, the Flash was the XCF04S.

When I powered the board for the first time, it came up with a preloaded configuration that displayed decimal digits on the 7-segment LED’s. The 7-segment LED’s flashed and counted in unison. Each push button caused one of the 7-segment LED’s to blank out. The slide switches controlled the small LED’s located above the push buttons.

Plugging in a VGA monitor showed a vertical red line on the right, a vertical green line on the left, and a horizontal blue line in the middle. Plugging in a PS/2 keyboard and setting SW0 to the “up” position caused the board to display scan codes from the keyboard.

FPGA land – from software to hardware

Thursday, June 22nd, 2006

One difficulty that presents itself is the software mindset. I’m a software developer myself, so I know a lot of the techniques of the software trade. But when I work with Verilog or VHDL, I adopt a completely different point of view.

With software, you view tasks in terms of sequence, repetition, and selection (choice). The predominant mode of thought is sequential. Parallelism or concurrency is handled primarily by the use of multitasking techniques. To a limited extent, parallelism can also be attained through vectorization.

With hardware, I view the tasks in terms of connections, conditions, and updates. All of the components of the hardware work simultaneously – in parallel. Serialization or sequencing is handled by state machine techniques. State machines can be as simple as counters, but can be more elaborate.